Modern computer chips are no longer designed by a single manufacturer. Instead, they comprise numerous so-called IP blocks — ready-made circuit components developed and exchanged by different companies. This accelerates development, but it also leaves valuable designs vulnerable: they can be copied or misappropriated through reverse engineering, whereby a technology is replicated by examining it in detail. This threat is growing rapidly, as artificial intelligence is now capable of recognising the functionality of a hardware design. Protective measures such as digital watermarks in the code or strict access controls are barely sufficient any longer to prevent such intrusions.

The ERC project MIRAGE will target this precise vulnerability: the exchange of RTL code (register transfer level, a hardware description language for chip circuitry) between companies, before a chip ever goes into production. MIRAGE aims to automatically generate alternative variants of the RTL code intended for transfer. These variants are functionally identical to the original — describing a component with exactly the same characteristics, such as speed or power consumption — yet are significantly harder for AI systems to identify or replicate. A licensee should be able to make unrestricted use of the code, while automated extraction of the underlying trade secret — in particular the specific design idea — through modern AI methods becomes extremely difficult and, ideally, practically infeasible within any reasonable effort.

Self-learning algorithms ensure functionality and protection

Within the MIRAGE framework, researchers are employing self-learning algorithms to generate code variants and are using comparative simulations to verify correct functionality. They are also testing whether modern AI models capable of understanding programme code genuinely fail to recognise the variants produced by MIRAGE.
The primary target groups are chip component manufacturers, design houses, and open hardware consortia that share or license RTL code during the development phase. Industry demand is substantial. Companies including Intel, KOBIL, and Synopsys have already signalled their interest in MIRAGE and pledged their support.
“Ultimately, the project is intended to protect innovation and competitiveness in the semiconductor industry — enabling open collaboration where it makes sense and providing protection where it is necessary for critical industries and everyday technologies,” says Ahmad-Reza Sadeghi, Professor of System Security at TU Darmstadt and lead of the MIRAGE project.

MIRAGE is based within the Department of Computer Science (research field Information and Intelligence (I+I)). As a proof-of-concept project, it builds on HYDRANOS, for which Sadeghi received an ERC Advanced Grant in 2022. HYDRANOS uses post-manufacture adaptable security-critical chip components to protect the hardware against unknown attacks. MIRAGE enhances the security of chip development by effectively safeguarding the underlying intellectual property at the very point at which design blueprints are exchanged.