Masking tries to break the connection between the secret protected data and the side-channel information obtained by an attacker. To this end, all intermediate values of a cryptographic operation will be masked with a random value. The goal of the project VeriSec is to develop tools that can automatically mask an unprotected implementation and further, tools that can automatically analyze a masked implementation regarding possible side-channels. Opposed to solely theoretical approaches known in literature, we ensure the functionality of the tools by a practical modeling of the side-channel information through concrete measurements.