The increasing prevalence of security breaches highlights the importance of robust hardware security measures. Among these breaches, physical attacks – such as Side-Channel Analysis (SCA) and Fault Injection (FI) attacks – pose a significant challenge for security-sensitive applications. To ensure robust system security throughout its lifecycle, hardware security updates are indispensable alongside software security patches. Programmable hardware plays a pivotal role in establishing a robust hardware root-of-trust, serving to effectively mitigate various hardware security threats. In this paper, we propose a methodology for the design of a reconfigurable fabric and the corresponding mapping toolchain, specifically tailored to hardware security. This approach offers resistance to various malicious physical attacks, including SCA and FI addressing each threat individually. As a case study, we propose a resulting fabric that implements a combination of first-order Boolean Masking and hiding countermeasures to provide strong protection against SCA attacks and enables the detection of fault injection attempts. In particular, we present how reconfigurable secure gadgets can be realized employing a reformed variant of the LMDPL hardware masking scheme and a modified version of WDDL to be composed into a fabric. We also show how any basic HDL design is automatically mapped to the primitives of our fabric, embedding provable hardware security, and bypassing the necessity for hardware security proficiency in this process. It is worth mentioning that our fabric requires approximately 85\% less area to map a secure design compared to conventional FPGA. A practical security evaluation of our secure fabric implementation on a real FPGA target board, using TVLA, demonstrated no SCA leakage over 100 million traces.